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System-Level Validation

High-Level Modeling and Directed Test Generation Techniques

Xiaoke Qin, Heon-Mo Koo, Prabhat Mishra, et al.

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ca. 96,29

Springer New York img Link Publisher

Naturwissenschaften, Medizin, Informatik, Technik / Elektronik, Elektrotechnik, Nachrichtentechnik

Beschreibung

This book covers state-of-the art techniques for high-level modeling and validation of complex hardware/software systems, including those with multicore architectures.  Readers will learn to avoid time-consuming and error-prone validation from the comprehensive coverage of system-level validation, including high-level modeling of designs and faults, automated generation of directed tests, and efficient validation methodology using directed tests and assertions.  The methodologies described in this book will help designers to improve the quality of their validation, performing as much validation as possible in the early stages of the design, while reducing the overall validation effort and cost.

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Schlagwörter

Automatic test generation, System-level verification, Integrated Circuit Design, UML, System-on-Chip verification, High-level modeling, Transaction level modeling, SystemC, Embedded Systems